Damascene processing is a method for forming interconnects on integrated circuits. It involves formation of inlaid metal wires in trenches and vias etched into a dielectric layer (inter layer dielectric or ILD). Damascene processing is often a preferred integration method because it requires fewer processing steps than other methods and offers a higher yield. It is also particularly well-suited to metals such as copper that cannot be readily patterned by plasma etching.
In a typical Damascene process flow, copper is deposited onto a patterned dielectric to fill the vias and trenches etched into the dielectric layer. The resulting metallization layer is typically formed either directly on a layer carrying active devices, or on a lower-lying metallization layer. Prior to filling with copper, the vias and trenches are lined with a thin layer of barrier material that prevents copper from diffusing into the ILD layer. Traditionally, conductive metal-based materials, such as tantalum, titanium and their nitrides, were used as in-feature diffusion barriers. Alternatively, as provided in the embodiments presented herein, non-conducting, dielectric-based diffusion barriers can be used. In a typical integrated circuit (IC), multiple interconnect levels are stacked on top of each other, where metal-filled vias and trenches serve as conducting paths between the active and passive elements in the IC. Within each metallization level lines (or wires) transmit signals horizontally across the circuit and vias allow signals to pass vertically, from level to level.
Fabrication of these interconnects presents several challenges, which become more and more significant as the dimensions of IC device features continue to shrink. Some of these challenges are addressed herein by providing dielectric rather than conductive in-via diffusion barrier layers.